Sunnyvale, CA, United States of America

Michael Gartlan

This inventor holds 3 USPTO granted patents. Top assignee: Koninklijke Philips Corporation N.v.. Active years: 2002-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Michael Gartlan. Retrieved from https://idiyas.com/inventor/michael-gartlan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.6

ph-index = 3

Forward Citations = 29(Granted Patents)


Company Filing History:


Years Active: 2002-2003

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3 patents (USPTO):Explore Patents

Title: Innovations by Michael Gartlan

Introduction

Michael Gartlan is an accomplished inventor based in Sunnyvale, CA. He has made significant contributions to the field of technology, particularly in clock systems and processing modules. With a total of 3 patents, Gartlan's work has had a notable impact on data transfer speeds and system resets in processing environments.

Latest Patents

One of Gartlan's latest patents is a "Clock system for multiple component system." This invention involves a clock module that operates in conjunction with the generation of a bus-clock signal. It provides a combination of module-clocks that ensure an adequate safety margin for data transfers among processing modules at the speed of the bus-clock. The system-clock generates both the bus-clock and a sample-clock, which has a predetermined phase relationship with respect to the bus-clock. This design allows for optimal data transfer speeds by sampling each base-clock with a sample-clock that maintains a specific phase relationship.

Another significant patent is the "Multiple module processing system with reset system independent of reset characteristics of the modules." This invention features a reset module that works alongside a system clock module to provide a combination of reset and clock assertions. It ensures that conventional processing modules with various reset architectures can be effectively reset. The reset command initiates the assertion of the reset signal and activates all clocks at the system level. By providing multiple clock cycles with the reset signal asserted, the invention addresses both asynchronous and synchronous reset requirements.

Career Highlights

Michael Gartlan is currently employed at Koninklijke Philips Corporation N.V., where he continues to innovate and develop new technologies. His work has been instrumental in enhancing the efficiency and reliability of processing systems.

Collaborations

Gartlan has collaborated with notable colleagues, including Rune Hartung Jensen and Thomas O'Dwyer. Their combined expertise has contributed to the successful development of various technological advancements.

Conclusion

Michael Gartlan's contributions to the field of technology through his innovative patents demonstrate his commitment to improving data transfer systems and processing module efficiency. His work continues to influence the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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