Michael Burstein

Title: Michael Burstein: Innovator in VLSI Chip Design

Introduction

Michael Burstein is a notable inventor based in Carmel, NY (US). He has made significant contributions to the field of Very Large Scale Integration (VLSI) chip design. His innovative approach has led to advancements that enhance the efficiency of chip layouts.

Latest Patents

Michael Burstein holds a patent for "Simultaneous placement and wiring for VLSI chips." This patent outlines a method for designing the layout of a master-slice VLSI chip. The process involves alternating steps for placing components and determining the wiring pattern that interconnects them in an iterative manner. The chip area is divided into subareas of decreasing size, and the components are partitioned into subsets that fit these subareas. After each partitioning step, the global wiring is determined for the existing subnets of the entire network. This interrelation of placement and wiring procedures results in advantages regarding total wire length, overflow number of wires, and processing time.

Career Highlights

Michael Burstein is associated with the International Business Machines Corporation (IBM). His work at IBM has allowed him to explore and implement innovative solutions in VLSI chip design. His contributions have been instrumental in advancing the technology used in modern electronics.

Collaborations

Some of his notable coworkers include Richard N Pelavin and Se June Hong. Their collaborative efforts have further enriched the research and development environment at IBM.

Conclusion

Michael Burstein's work in VLSI chip design exemplifies the impact of innovation in technology. His patent and contributions continue to influence the field, showcasing the importance of effective design methodologies in electronics.