Mantin, Malaysia

Mei Ching Lim

This inventor holds 1 USPTO granted patent. Top assignee: Altera Corporation. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mei Ching Lim. Retrieved from https://idiyas.com/inventor/mei-ching-lim

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Mei Ching Lim: Inventor of a Programmable Power-Down Scheme

Introduction

Mei Ching Lim is an inventor associated with Mantin, Malaysia, and Altera Corporation. Her patent work addresses power management in integrated circuits containing embedded memory.

Latest Patents

Lim is credited with 1 patent, titled “Programmable Power Down Scheme for Embedded Memory Block.” The invention describes an integrated circuit designed to supply power selectively to the portions of a memory array that are in use. It uses global and local power buses connected through programmable vias, with the memory array remapped so unused column portions become unused row portions. The vias can be positioned during circuit design to direct power to the used portions of the array.

Career Highlights

Lim’s listed patent reflects work on reducing unnecessary power delivery in embedded memory blocks. The patent identifies Altera Corporation as her company affiliation.

Collaborations

Wei Yee Koay and Ngee Kiat Chieng are listed as Lim’s coworkers. The available information does not specify their roles in the patent or whether they collaborated on it.

Conclusion

Mei Ching Lim’s patent focuses on selectively powering active portions of an embedded memory array, highlighting a practical approach to power management in integrated circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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