Carate Brianza, Italy

Maurizio Viti

This inventor holds 1 USPTO granted patent. Top assignee: Gte Telecommunicazioni, S.p.a.. Active years: 1988.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Maurizio Viti. Retrieved from https://idiyas.com/inventor/maurizio-viti

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 1988

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1 patent (USPTO):Explore Patents

Title: Maurizio Viti: Innovator in Phase-Locked Loop Technology

Introduction

Maurizio Viti is a notable inventor based in Carate Brianza, Italy. He has made significant contributions to the field of telecommunications, particularly in the development of phase-locked loop technology. His innovative work has led to the creation of a patent that addresses critical challenges in signal processing.

Latest Patents

Maurizio Viti holds a patent for a "Phase-frequency comparator for phase-locked loops." This invention describes an instantaneous comparison unit with an associated sequential state logic circuit. The technology functions to maintain a condition of phase locking with a reference signal that is substantially immune to disturbances causing losses or additions of signal fronts. The disclosed circuit also detects and compensates for continuous phase shifting conditions during the transient period that precedes phase locking.

Career Highlights

Maurizio Viti is currently associated with GTE Telecommunicazioni S.p.a., where he applies his expertise in telecommunications. His work has been instrumental in advancing the capabilities of phase-locked loops, which are essential in various electronic applications.

Collaborations

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Conclusion

Maurizio Viti's contributions to phase-locked loop technology exemplify his innovative spirit and dedication to advancing telecommunications. His patent reflects a significant step forward in ensuring reliable signal processing in electronic systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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