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For the Inventor, By the Inventor

Kawasaki, Japan

Masato Igarashi

This inventor holds 5 USPTO granted patents. Top assignee: Kabushiki Kaisha Toshiba. Active years: 1998-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masato Igarashi. Retrieved from https://idiyas.com/inventor/masato-igarashi-2zu2p9e2

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5

% Patents Active = 40.0

Average Co-Inventor Count = 1.7

ph-index = 3

Forward Citations = 64(Granted Patents)


Location History:

  • Chiba-Ken, JP (2006)
  • Yachiyo, JP (1998 - 2009)
  • Kawasaki, JP (2011)

Company Filing History:

goldMedal5 out of 53,262 
 
Kabushiki Kaisha Toshiba
 patents

Years Active: 1998-2011

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5 patents (USPTO):Explore Patents
1. 8036874 - Software executing device and co-operation method (2011-10-11),
2. 7624389 - Design evaluation system and design evaluation method (2009-11-24),
3. 6996788 - Hardware-operation description conversion method and program therefor (2006-02-07),
4. 6131109 - Multitask processor, a multitask processing method, a multitask (2000-10-10),
5. 5845125 - Debugger using class information and dynamic instance inter-relationships (1998-12-01),

Title: Masato Igarashi: Innovator in Software Execution and Design Evaluation

Introduction

Masato Igarashi is a prominent inventor based in Kawasaki, Japan. He has made significant contributions to the field of software execution and design evaluation, holding a total of five patents. His work focuses on enhancing the interaction between software and hardware systems.

Latest Patents

Igarashi's latest patents include a "Software Executing Device and Co-operation Method." This invention provides a software executing device that collaborates with a hardware circuit or simulator. It features a software executing unit, an execution monitoring unit, a determining unit, and a synchronization controlling unit. These components work together to ensure that the software and hardware are synchronized based on the execution state of the software.

Another notable patent is the "Design Evaluation System and Design Evaluation Method." This system incorporates a static analyzer, a compiler, a dynamic analyzer, and a memory load calculator. It effectively evaluates the design by analyzing the functions and variables from the source code, compiling it into executable code, and calculating memory loads based on variable lifetimes.

Career Highlights

Masato Igarashi is currently employed at Kabushiki Kaisha Toshiba, where he continues to innovate in the field of software and hardware integration. His work has been instrumental in advancing the capabilities of design evaluation systems.

Collaborations

Igarashi has collaborated with notable colleagues, including Noriaki Koyama and Katsuhiko Ueki. Their combined expertise has contributed to the development of cutting-edge technologies in their respective fields.

Conclusion

Masato Igarashi's contributions to software execution and design evaluation demonstrate his commitment to innovation. His patents reflect a deep understanding of the complexities involved in software and hardware interactions. Through his work at Toshiba and collaborations with esteemed colleagues, Igarashi continues to push the boundaries of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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