Hyogo, Japan

Masanari Nakashima

This inventor holds 1 USPTO granted patent. Top assignee: Japan Electronic Materials Corporation. Active years: 2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masanari Nakashima. Retrieved from https://idiyas.com/inventor/masanari-nakashima

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2006

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1 patent (USPTO):Explore Patents

Title: Masanari Nakashima: Innovator in Semiconductor Technology

Introduction

Masanari Nakashima is a prominent inventor based in Hyogo, Japan. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent related to probe cards.

Latest Patents

Nakashima holds a patent for a "Probe card for examining semiconductor devices on semiconductor wafers." This invention allows the members configuring the probe card to be easily separated and assembled. It prevents the occurrence of electrical conduction failure between electrodes, achieving high electrical contact and reliability. The probe card is essential for measuring the electrical properties of semiconductor devices and includes a space transformer with multiple contacts and connecting pins, a main substrate with connecting electrodes, and a sub-substrate that facilitates electrical conduction.

Career Highlights

Nakashima is associated with Japan Electronic Materials Corporation, where he has been instrumental in advancing semiconductor testing technologies. His work has contributed to the efficiency and reliability of semiconductor device examinations.

Collaborations

He has collaborated with notable coworkers, including Katsuhiko Satou and Chikaomi Mori, who have also contributed to advancements in semiconductor technologies.

Conclusion

Masanari Nakashima's innovative work in semiconductor technology, particularly his patented probe card, showcases his commitment to enhancing the reliability and efficiency of semiconductor device testing. His contributions continue to impact the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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