Masako Murofushi

Title: Masako Murofushi: Innovator in Semiconductor Design

Introduction

Masako Murofushi is a prominent inventor based in Kanagawa, Japan. She has made significant contributions to the field of semiconductor design, holding a total of 3 patents. Her work focuses on improving the performance of integrated circuits, which is crucial for modern electronic devices.

Latest Patents

Murofushi's latest patents include a layout design method and system for an improved place and route. This innovative method enhances circuit performance related to operated frequency and power consumption by optimizing placement and routing. The method features an intersecting wiring predicting step that anticipates the number of intersecting wirings based on predicted wiring routes, along with an intersecting wiring capacitance calculating step that computes the capacitances between these wirings. Another notable patent is a semiconductor device manufacturing method that modifies the combination of logic gates based on the physical locations of the gates in a semiconductor integrated circuit. This method allows for the transformation of circuit portions into logically equivalent intermediate representations, leading to the generation of a new combination of logic gates.

Career Highlights

Masako Murofushi is currently employed at Kabushiki Kaisha Toshiba, where she continues to innovate in semiconductor technology. Her expertise and contributions have positioned her as a key figure in her field.

Collaborations

Some of her notable coworkers include Takashi Ishioka and Fumihiro Minami, who collaborate with her on various projects within the company.

Conclusion

Masako Murofushi's work in semiconductor design exemplifies her commitment to innovation and excellence. Her patents reflect her ability to address complex challenges in the industry, making her a valuable asset to Kabushiki Kaisha Toshiba and the broader field of technology.