This inventor holds 1 USPTO granted patent. Top assignee: Novellus Systems Incorporated. Active years: 2011.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2011
Title: Mark J Wiley: Innovator in Semiconductor Technology
Introduction
Mark J Wiley is a prominent inventor based in Portland, OR (US). He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.
Latest Patents
Mark J Wiley holds a patent for a process titled "Process for through silicon via filling." This patent describes a semiconductor electroplating process that deposits copper into through silicon via holes, ensuring a substantially void-free fill. The process is capable of handling vias that are more than about 3 micrometers in diameter and over 20 micrometers deep. The method utilizes a high copper concentration and low acidity electroplating solution for effective deposition.
Career Highlights
Mark J Wiley is associated with Novellus Systems Incorporated, a company known for its advancements in semiconductor manufacturing technologies. His work has been instrumental in enhancing the efficiency and effectiveness of semiconductor production processes.
Collaborations
Some of his notable coworkers include Katie Qun Wang and Jonathan David Reid, who have also contributed to the field of semiconductor technology.
Conclusion
Mark J Wiley's innovative work in semiconductor technology, particularly his patent for through silicon via filling, showcases his expertise and commitment to advancing the industry. His contributions continue to influence the field and inspire future innovations.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile