Santa Clara, CA, United States of America

Mahesh Mamidipaka


Average Co-Inventor Count = 1.0

ph-index = 2

Forward Citations = 24(Granted Patents)


Company Filing History:


Years Active: 2008-2010

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2 patents (USPTO):

Title: Mahesh Mamidipaka: Innovator in Power Gating Technology

Introduction

Mahesh Mamidipaka is a notable inventor based in Santa Clara, CA (US). He has made significant contributions to the field of power management through his innovative techniques. With a total of 2 patents, Mamidipaka has focused on enhancing the efficiency of electronic circuits.

Latest Patents

One of his latest patents is titled "Automatic extension of clock gating technique to fine-grained power gating." This method extends a clock-gating technique to provide a sleep signal for controlling switch circuits that reduce active leakage power. By utilizing this extension, fine-grained power-gating is achieved. The method automatically identifies, at an RTL or gate level, the logic circuits that can be power-gated. Furthermore, it derives a sleep signal for fine-grained power-gating that is applicable to both time-critical and non-time-critical designs.

Career Highlights

Throughout his career, Mahesh Mamidipaka has worked with prominent companies in the technology sector. He has been associated with Sequence Design, Inc. and Apache Design Solutions, Inc. His experience in these organizations has contributed to his expertise in power management technologies.

Conclusion

Mahesh Mamidipaka stands out as an innovator in the realm of power gating technology. His contributions through patents and professional experience have significantly impacted the efficiency of electronic circuits.

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