Lonnie L Lambert

Title: Lonnie L Lambert: Innovator in Memory Scan Testability

Introduction

Lonnie L Lambert is a notable inventor based in Plano, TX (US). He has made significant contributions to the field of memory scan testability, showcasing his expertise through his innovative patent.

Latest Patents

Lonnie L Lambert holds a patent for "Systems and methods for improved memory scan testability." This invention presents a method and system for testing devices that incorporate both digital and analog components. The digital section consists of multiple latch devices, while the analog section includes various memory cells and selector devices. A selector input governs each selector device, which is electrically linked to a corresponding memory cell and indirectly connected to one of the latch devices. A load clock is utilized to input a pattern into the latch devices, and a derivative of this pattern is processed by the selectors before being returned to the latch devices upon asserting the selector input. A system clock subsequently loads the derivative pattern into the latch devices. This innovative approach enhances the efficiency and effectiveness of memory testing.

Career Highlights

Lonnie L Lambert is associated with Texas Instruments Corporation, a leading company in the semiconductor industry. His work at Texas Instruments has allowed him to contribute to advancements in technology and innovation.

Collaborations

Throughout his career, Lonnie has collaborated with esteemed colleagues such as William E Grose and Jeanne Krayer Pitz. These collaborations have further enriched his work and contributed to the development of innovative solutions in the field.

Conclusion

Lonnie L Lambert's contributions to memory scan testability exemplify his innovative spirit and dedication to advancing technology. His patent and work at Texas Instruments Corporation highlight his role as a significant figure in the field of electronics.