Taipei, Taiwan

Li-Chaio Chou

This inventor holds 2 USPTO granted patents and 1 published patent application. Top assignee: Texas Instruments Corporation. Active years: 2011-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Li-Chaio Chou. Retrieved from https://idiyas.com/inventor/li-chaio-chou

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2011-2012

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2 patents (USPTO):Explore Patents

Title: Li-Chaio Chou: Semiconductor Packaging Inventor

Introduction

Li-Chaio Chou is an inventor associated with Taipei, Taiwan, whose patent work focuses on semiconductor chip packaging. Chou is listed as a woman and is associated with Texas Instruments Corporation. Her portfolio includes 2 patents.

Latest Patents

Chou’s listed patents concern semiconductor chip package assemblies with deflection-resistant leadfingers. The disclosed designs use leadframes with a chip-mounting surface and leadfingers that provide electrical paths from their wirebond-receiving proximal ends to their distal ends.

A key feature is an offset portion near the proximal end of one or more leadfingers. Positioned opposite the plane of the heat spreader, the offset increases clearance from the underlying heat spreader and improves leadfinger stiffness, resistance to deflection, and spring-back. In preferred embodiments, bondwires connect the semiconductor chip’s bond pads to the offset portions of the leadfingers.

Career Highlights

Chou’s patent work addresses practical challenges in semiconductor packaging, including leadfinger movement and clearance around heat spreaders. The disclosed approach combines leadframe geometry with chip and wirebond arrangements to support reliable package assembly.

Collaborations

Chou’s listed coworkers include Yuan-Pao Cheng and Chien-Te Feng. The patent descriptions concern leadframes, semiconductor chip package assemblies, and methods for assembling them.

Conclusion

Li-Chaio Chou’s patents highlight an engineering approach to semiconductor packaging that uses offset leadfinger designs to improve clearance, stiffness, and resistance to deflection.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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