Lancelot Y Kwong

Title: Lancelot Y Kwong: Innovator in Memory Circuit Testing and Logic Gate Design

Introduction

Lancelot Y Kwong is a notable inventor based in Fremont, CA, with a focus on advancements in memory circuit testing and logic gate design. He holds a total of 3 patents, showcasing his contributions to the field of electronics and integrated circuits.

Latest Patents

One of his latest patents is related to memory circuit march testing. This invention includes novel approaches for scan-based device testing using a march controller. A march data store can have sets of march element data stored thereon, each defining a respective march element of a march test sequence. A march select register can select each stored set of march element data according to the predefined march test sequence, and a march data loader can iteratively and sequentially output each set of march element data selected by the march select register. A memory built-in self-test controller can generate, in response to receiving each set of march element data output by the march controller, test stimulus data corresponding to the received set of march element data. The test stimulus data can input to a scan chain of the integrated circuit under test, and response data can be captured from the scan chain and assessed to determine whether the integrated circuit passed the test.

Another significant patent is for a high-speed static XOR circuit. This static complementary transistor type logic gate circuit includes a plurality of input terminals for receiving a corresponding plurality of input signals, and an output terminal. The logic gate circuit further includes a first plurality of transistors of one conductivity type, arranged to form a plurality of pullup paths for selectively connecting the output terminal, through one or more intermediate nodes, to a positive supply voltage based on the plurality of input signals. Additionally, a second plurality of transistors of the complementary conductivity type is arranged to form a plurality of pulldown paths for selectively connecting the output terminal, through one or more intermediate nodes, to a negative supply voltage based on the plurality of input signals. A precharge device is configured to selectively charge an intermediate node to the far-side supply voltage when the intermediate node is disconnected from the near-side supply voltage and disconnected from the output terminal.

Career Highlights

Lancelot has worked with prominent companies such as Oracle International Corporation and Sun Microsystems, Inc. His experience in these organizations has contributed to his expertise in the field of electronics and integrated circuit design.