Athens, Greece

Lampros Kokkalas

This inventor holds 1 USPTO granted patent. Top assignee: Helic, Inc.. Active years: 2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Lampros Kokkalas. Retrieved from https://idiyas.com/inventor/lampros-kokkalas

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):Explore Patents

Title: Innovations by Lampros Kokkalas

Introduction

Lampros Kokkalas is a notable inventor based in Athens, Greece. He has made significant contributions to the field of electronic design automation. His work focuses on improving the efficiency and accuracy of integrated circuit design.

Latest Patents

Kokkalas holds a patent titled "Systems, methods and devices for providing RLCK parasitic extraction back-annotation in electronic design automation." This patent presents systems, computer-readable storage media, and methods for providing RLCK parasitic extraction for the electronic design of integrated circuits. The method involves importing a simulator netlist, generating a connectivity list, extracting an RLCK netlist, and updating the simulator netlist to include RLCK parasitics.

Career Highlights

Lampros Kokkalas is currently employed at Helic, Inc. His work at the company has been instrumental in advancing electronic design automation technologies. He has developed innovative methods that enhance the design process for integrated circuits.

Collaborations

Kokkalas has collaborated with several professionals in his field, including Apostolos Liapis and Manuela Andreea Mironiuc. These collaborations have contributed to the development of advanced technologies in electronic design.

Conclusion

Lampros Kokkalas is a prominent inventor whose work in electronic design automation has led to significant advancements in the field. His innovative patent and collaborations highlight his commitment to improving integrated circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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