Lalita Satapathy

Title: Lalita Satapathy: Innovator in Integrated Circuit Layout Optimization

Introduction

Lalita Satapathy is a prominent inventor based in Milpitas, CA (US). She has made significant contributions to the field of integrated circuit design, particularly in optimizing netlist change order flows. Her innovative approach has the potential to streamline the design process in the semiconductor industry.

Latest Patents

Lalita holds a patent titled "Comparison of two hierarchical netlist to generate change orders for updating an integrated circuit layout." This patent describes a method and system for optimizing a netlist change order flow. The invention involves comparing a modified version of a netlist with an original hierarchical netlist outside of the layout tool. It automatically generates at least one change order based on the differences found between the two netlists. Once the change order is generated, it is applied to the design layout to create a modified design layout. Lalita has 1 patent to her name.

Career Highlights

Lalita is currently employed at LSI Logic Corporation, where she continues to work on innovative solutions in integrated circuit design. Her expertise in this area has made her a valuable asset to her team and the company.

Collaborations

Lalita has collaborated with notable colleagues, including Santhanakris Raman and Richard D Blinne. These collaborations have contributed to her success and the advancement of technology in her field.

Conclusion

Lalita Satapathy is a trailblazer in the realm of integrated circuit layout optimization. Her patent and work at LSI Logic Corporation exemplify her commitment to innovation and excellence in technology.