This inventor holds 7 USPTO granted patents. Top assignee: Lam Research Corporation. Active years: 2009-2016.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Pleasanton, CA (US) (2009 - 2010)
- San Jose, CA (US) (2012 - 2014)
- Cupertino, CA (US) (2016)
Company Filing History:
Years Active: 2009-2016
Title: Kyeong-Koo Chi and Semiconductor Etch Innovation.
Introduction
Kyeong-Koo Chi is an inventor based in San Jose, California, whose work focuses on semiconductor etching processes. Chi is associated with Lam Research Corporation and is credited with 7 patents.
Latest Patents
Chi’s latest patent work includes methods for improving control during high-aspect-ratio etching.
“Sulfur and Fluorine Containing Etch Chemistry for Improvement of Distortion and Bow Control for HAR Etch” describes etching features through alternating layers in a stack above a substrate. The method uses a plasma formed from an etching gas containing specified sulfur-, fluorine-, carbon-, and hydrogen-based molecules. Its aim is to improve distortion and bow control during the etching process.
“Ultra-High Aspect Ratio Dielectric Etch” presents a method for etching a high-aspect-ratio feature in a dielectric layer through a carbon-based mask. The process alternates selective dielectric etching with selective removal of fluorocarbon polymer deposited on the mask, while preserving the mask for subsequent etching.
Career Highlights
Chi’s listed inventions address challenges in fabricating semiconductor structures with deep, narrow features. The disclosed techniques use tailored plasma chemistry and controlled polymer deposition and removal to support precision etching through layered materials.
Collaborations
Chi’s listed coworkers include Erik A. Edelberg and Jonathan Sungehul Kim. The patent information provided identifies Lam Research Corporation as Chi’s company.
Conclusion
Kyeong-Koo Chi’s patent portfolio reflects work on advanced semiconductor etching, with methods designed to improve process control and enable high-aspect-ratio feature fabrication.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
