Location History:
- Taoyuan, TW (2012)
- Kaohsiung, TW (2023)
Company Filing History:
Years Active: 2012-2023
Title: Innovations by Kuang Hsiung Chen
Introduction
Kuang Hsiung Chen is a notable inventor based in Taoyuan, Taiwan. He has made significant contributions to the field of semiconductor technology, holding two patents that showcase his innovative spirit and technical expertise.
Latest Patents
His latest patents include a "Semiconductor device package and method for manufacturing the same." This invention features a semiconductor device package that consists of a first circuit layer, a second circuit layer, a first semiconductor die, and a second semiconductor die. The first circuit layer has a first surface and a second surface opposite to the first surface. The second circuit layer is positioned on the first surface of the first circuit layer. The first semiconductor die is placed on both the first circuit layer and the second circuit layer, establishing electrical connections with both layers. The second semiconductor die is situated on the second circuit layer and is electrically connected to it. Another patent is for a "Reinforced assembly carrier," which enhances the mechanical strength of the assembly carrier by incorporating a supporting frame made of molding compound on the edge areas of its upper and/or lower surfaces.
Career Highlights
Kuang Hsiung Chen is currently employed at Advanced Semiconductor Engineering, Inc., where he continues to push the boundaries of semiconductor technology. His work has been instrumental in developing advanced packaging solutions that improve the performance and reliability of semiconductor devices.
Collaborations
He collaborates with talented coworkers, including Chih-Cheng Lee and Ren Yih Jeng, who contribute to the innovative projects at their company.
Conclusion
Kuang Hsiung Chen's contributions to semiconductor technology through his patents reflect his dedication to innovation and excellence in engineering. His work not only advances the field but also sets a benchmark for future developments in semiconductor packaging.