This inventor holds 5 USPTO granted patents. Top assignee: Nec Corporation. Active years: 1998-2026.
Company Filing History:
Years Active: 1998-2026
Title: Kousuke Yoshida: Innovator in Low Power Circuit Design
Introduction
Kousuke Yoshida is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of electronics, particularly in the development of low power consuming circuits. With a total of 5 patents to his name, Yoshida's work is recognized for its innovative approach to power efficiency.
Latest Patents
Yoshida's latest patents include a low power consuming circuit and an input/output protection circuit. The low power consuming circuit utilizes the Vt (threshold voltage) characteristic of a Metal Insulator Semiconductor (MIS) transistor to reduce power consumption. This circuit features vertically stacked N-channel transistors configured as an inverter, with a source voltage control circuit that manages gate and drain voltages effectively. The input/output protection circuit is designed to safeguard internal elements from electrostatic pulses. It includes a series connection of a diode and a bipolar transistor, which clamps any electrostatic pulse applied to the input/output terminal, thereby protecting the internal components.
Career Highlights
Kousuke Yoshida is currently associated with NEC Corporation, where he continues to innovate in the field of electronics. His work has been instrumental in advancing technologies that prioritize energy efficiency and protection against electrical disturbances.
Collaborations
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Conclusion
Kousuke Yoshida's contributions to low power circuit design and protection mechanisms highlight his role as a key innovator in the electronics industry. His patents reflect a commitment to enhancing energy efficiency and safeguarding electronic components.