Yokohama, Japan

Kenta Aruga

This inventor holds 18 USPTO granted patents and 2 published patent applications, primarily in Analog Circuit Design. Top assignees: Fujitsu Semiconductor Limited, Socionext Inc., Fujitsu Corporation. Active years: 2008-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kenta Aruga. Retrieved from https://idiyas.com/inventor/kenta-aruga

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 18 

% Patents Active = 94.4

Average Co-Inventor Count = 2.7

ph-index = 8

Forward Citations = 143(Granted Patents)


Location History:

  • Shinjuku, JP (2011)
  • Kawasaki, JP (2008 - 2013)
  • Kunitachi, JP (2014)
  • Akishima, JP (2015)
  • Yokohama, JP (2013 - 2020)
  • Kanagawa, JP (2024)

Company Filing History:


Years Active: 2008-2025

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Areas of Expertise:
Analog Circuit
A/D Converter
Semiconductor Integrated Circuit
Sampling Circuit
Radio Communication
Phase Lock Loop
Capacitor Array
Voltage Reference
Regulator Circuit
Successive Approximation
Capacitive Element
Constant-Voltage Generator
18 patents (USPTO):Explore Patents

Title: Kenta Aruga: Innovations in Semiconductor Circuits

Introduction

Kenta Aruga, an accomplished inventor based in Yokohama, Japan, holds an impressive portfolio with 17 patents to his name. His work primarily focuses on the development of advanced circuits that play a crucial role in modern technology. As a key figure in the field of semiconductor technology, Aruga has contributed significantly to innovations that enhance communication and processing capabilities.

Latest Patents

Among Kenta Aruga's latest patents are several groundbreaking developments in circuit design. One of his notable inventions is a processing circuit that includes a clock generating circuit, a frequency dividing and delay circuit, an analog-to-digital converter circuit, and a control circuit that works seamlessly to optimize performance. This invention aims to enhance the efficiency of signal processing in various applications.

Another significant patent introduced by Aruga is the injection-locked phase lock loop circuit. This circuit employs a phase frequency detector that outputs a detection signal based on the phase or frequency difference between a reference signal and a feedback signal. Furthermore, it features a voltage-controlled oscillator (VCO) with a ring oscillator configuration, which is capable of finely controlling the output signal's frequency and phase, demonstrating Aruga's expertise in innovative circuit design.

Career Highlights

Throughout his career, Kenta Aruga has been associated with prestigious companies, notably Fujitsu Semiconductor Limited and Socionext Inc. His work within these organizations has allowed him to collaborate on numerous projects, leading to impactful innovations in the semiconductor industry. His contributions have not only advanced the products developed by these companies but have also driven the overall growth of technology in this field.

Collaborations

Kenta Aruga has had the pleasure of collaborating with esteemed coworkers, including Suguru Tachibana and Koji Okada. These partnerships have been instrumental in fostering an environment of creativity and innovation, further enriching the projects they have worked on together. Such collaborations exemplify the spirit of teamwork that often leads to groundbreaking inventions and advancements.

Conclusion

Kenta Aruga's dedication and innovative spirit have positioned him as a significant contributor to the field of semiconductor technology. With a strong portfolio of patents and valuable collaborations, his work continues to inspire future advancements in circuit design and processing capabilities. As technology evolves, the impact of innovators like Aruga remains crucial in shaping the future of electronics and communication.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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