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For the Inventor, By the Inventor

Tokyo, Japan

Kenji Matsubara

This inventor holds 6 USPTO granted patents and 1 published patent application. Top assignee: Hitachi, Ltd.. Active years: 2000-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kenji Matsubara. Retrieved from https://idiyas.com/inventor/kenji-matsubara-j12s5oe1

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 6 

% Patents Active = 50.0

Average Co-Inventor Count = 3.0

ph-index = 3

Forward Citations = 113(Granted Patents)


Company Filing History:

goldMedal6 out of 42,743 
 
Hitachi, Ltd.
 patents

Years Active: 2000-2006

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6 patents (USPTO):Explore Patents
1. 7028160 - Processing device with prefetch instructions having indicator bits specifying cache levels for prefetching (2006-04-11),
2. 7028159 - Processing device with prefetch instructions having indicator bits specifying cache levels for prefetching (2006-04-11),
3. 6598127 - Information processing system with prefetch instructions having indicator bits specifying a quantity of operand data for prefetching (2003-07-22),
4. 6598126 - Processing device which prefetches instructions having indicator bits specifying cache levels for prefetching (2003-07-22),
5. 6381679 - Information processing system with prefetch instructions having indicator bits specifying cache levels for prefetching (2002-04-30),
6. 6131145 - Information processing unit and method for controlling a hierarchical (2000-10-10),

Title: Kenji Matsubara: Innovator in Information Processing Technology

Introduction

Kenji Matsubara is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of information processing technology, holding a total of 6 patents. His work focuses on enhancing the efficiency of processing devices through innovative prefetching techniques.

Latest Patents

Matsubara's latest patents include a processing device with prefetch instructions that utilize indicator bits to specify cache levels for prefetching. This invention describes an information processing system that comprises a main memory and a processing unit. The processing unit executes a prefetch instruction, which is part of a program stored in the main memory. The system features an internal cache functioning as a first-level cache and an external cache controlled as a second-level cache. The prefetch instruction enables the processing unit to selectively perform a prefetch operation, transferring operand data from the main memory to the caches before executing subsequent load instructions. The inclusion of multiple indication bits allows for precise control over the cache levels to which the operand data is transferred.

Career Highlights

Kenji Matsubara is currently employed at Hitachi, Ltd., where he continues to develop innovative solutions in information processing. His expertise in cache management and prefetching techniques has positioned him as a key figure in advancing technology in this domain.

Collaborations

Throughout his career, Matsubara has collaborated with notable colleagues, including Toshihiko Kurihara and Hiromitsu Imori. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Kenji Matsubara's contributions to information processing technology through his patents and collaborations highlight his role as a leading inventor in the field. His work continues to influence advancements in processing devices, making significant strides in efficiency and performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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