Streamwood, IL, United States of America

Ken Cholewczynski

This inventor holds 2 USPTO granted patents. Top assignee: Motorola Corporation. Active years: 1992-1993.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ken Cholewczynski. Retrieved from https://idiyas.com/inventor/ken-cholewczynski

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 84(Granted Patents)


Company Filing History:


Years Active: 1992-1993

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Ken Cholewczynski: Innovator in Solder Bumping Technology

Introduction

Ken Cholewczynski is a notable inventor based in Streamwood, IL (US). He has made significant contributions to the field of solder bumping technology, holding 2 patents that enhance the manufacturing processes in electronics.

Latest Patents

Cholewczynski's latest patents include a method for forming solder-bumped terminals on a planar dielectric substrate. This innovative method utilizes a terminal of a specific configuration, which involves depositing a thin plate of solder alloy onto the terminal and reflowing it to create a bump. The terminal configuration features an enlarged terminal pad connected to a relatively narrow linear runner section. The runner section's width is ideally between 50 and 150 microns, while the pad width is between 1.2 and 2.0 times that of the runner section. The terminal is initially fabricated with a metal layer adjacent to the substrate, typically made of copper, and a thin outer plate composed of the solder alloy. The solder plate is uniformly deposited onto both the terminal pad and the adjacent runner section. Upon heating, the solder melts, allowing the molten solder to be drawn from the runner onto the enlarged pad to form a bump. In a preferred embodiment, a solder plate of 10 to 25 microns is electrodeposited onto the terminal and reflowed to create a bump with a height between 60 and 80 microns.

Another of his patents details a method for forming a solder-bumped circuit trace on a planar dielectric substrate. This method involves fabricating a trace with an intersection between linear sections, depositing a uniform thin plate of solder alloy onto the trace, and reflowing the solder to form a bump at the intersection. The trace consists of first and second linear sections that intersect at an angle between 45 degrees and 135 degrees, with widths ideally between 50 and 150 microns. The solder plate is deposited, preferably by electroplating, at a thickness of 10 to 25 microns. When the trace is heated, the solder coalesces at the intersection to form the bump.

Career Highlights

Ken Cholewczynski is currently employed at Motorola Corporation, where he continues to innovate in the field of electronics manufacturing. His work has significantly impacted the efficiency and effectiveness of solder bumping techniques.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…