Keizou Asaoka

Title: Keizou Asaoka: Innovator in Semiconductor Technology

Introduction

Keizou Asaoka is a prominent inventor based in Kobe, Japan. He has made significant contributions to the field of semiconductor technology, particularly with his innovative designs that enhance device performance. His work has implications for various applications in electronics and energy conversion.

Latest Patents

Asaoka holds a patent for a semiconductor pin device with an interlayer or dopant gradient. This semiconductor device comprises pin-type or nip-type amorphous-containing semiconductor layers. The invention is characterized by several key features: at least one interlayer made of semiconductor or insulator with higher electrical resistivity than the adjoining semiconductor, a gradual increase in dopant concentration from the junction interface, and the inclusion of a p-type or n-type semiconductor layer with higher impurity density interposed between the semiconductor layer and the electrode. This design allows for large open-circuit voltage (Voc) and electric current at specific voltages, improving photoelectric conversion efficiency.

Career Highlights

Keizou Asaoka is associated with Kanegafuchi Kagaku Kogyo Kabushiki Kaisha, where he has been instrumental in advancing semiconductor technologies. His innovative approach has led to the development of devices that are more efficient and effective in their applications.

Collaborations

Asaoka has worked alongside notable colleagues such as Hideo Yamagishi and Masataka Kondo. Their collaborative efforts have contributed to the advancement of semiconductor technology and innovation.

Conclusion

Keizou Asaoka's contributions to semiconductor technology through his innovative patent demonstrate his commitment to enhancing device performance. His work continues to influence the field and pave the way for future advancements in electronics.