Kyoto, Japan

Keisuke Kadowaki

This inventor holds 3 USPTO granted patents. Top assignee: Rohm Co., Ltd.. Active years: 2012-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Keisuke Kadowaki. Retrieved from https://idiyas.com/inventor/keisuke-kadowaki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2012-2018

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3 patents (USPTO):Explore Patents

Title: Keisuke Kadowaki: Semiconductor and Circuit Innovations

Introduction

Keisuke Kadowaki is an inventor based in Kyoto, Japan, whose patent work includes semiconductor devices and electronic circuit design. He is associated with Rohm Co., Ltd. His listed portfolio includes 3 patents.

Latest Patents

Kadowaki’s listed patents include “Semiconductor device,” which describes a device with multiple transistors whose gate-electrode geometry is designed to interrupt switching at a desired frequency. The transistors’ current inflow terminals are connected to one another, as are their current outflow terminals.

Another listed invention, “Dead time adjusting circuit,” monitors the voltage at the connection between two series-connected output switches. It detects the dead times between the switches’ turn-off and turn-on events and feedback-controls each interval to match a predetermined target value.

Career Highlights

Kadowaki’s patent activity reflects work on semiconductor-device structures and timing control in electronic circuits. His association with Rohm Co., Ltd. places these inventions within the company’s semiconductor and electronics research context.

Collaborations

The provided information names Tomoyuki Miki and Koji Nishikawa as Kadowaki’s coworkers. It does not specify their roles in the listed patents.

Conclusion

Keisuke Kadowaki’s documented inventions address transistor design and precise switching-time control, highlighting his contributions to semiconductor and circuit innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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