Hsinchu, Taiwan

Ke-ming Su

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Chip-Gan Power Semiconductor Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ke-ming Su. Retrieved from https://idiyas.com/inventor/ke-ming-su-9bswlapj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Ke-ming Su: Innovator in Logic Gate Circuits and Power Devices

Introduction

Ke-ming Su is an inventor based in Hsinchu City, Taiwan. He has made significant contributions to the field of electronics, particularly in the development of logic gate circuits and power devices. Although he currently holds no granted patents, his innovative ideas are reflected in his latest patent applications.

Latest Patent Applications

Ke-ming Su's latest patent applications include two notable inventions. The first is a **Logic Gate Circuit**, which comprises a first N-type transistor circuit, a second N-type transistor circuit, a capacitor, and a clamping circuit. Each of the N-type transistor circuits includes at least one N-type transistor. The design allows for efficient voltage management through the clamping circuit. The second application is for a **Power Device**, which features a power switch circuit, a driver, a regulator, and at least one power obtaining circuit. This device is designed to optimize power management by obtaining necessary voltages internally, eliminating the need for additional external power sources.

Conclusion

Ke-ming Su's work in logic gate circuits and power devices showcases his innovative spirit and potential impact on the electronics industry. His latest patent applications reflect a commitment to advancing technology in meaningful ways.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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