Palo Alto, CA, United States of America

Ke Chen

This inventor holds 2 USPTO granted patents and 3 published patent applications and 1 EPO patent. Top assignee: Hewlett Packard Enterprise Development LP. Active years: 2018-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ke Chen. Retrieved from https://idiyas.com/inventor/ke-chen-39aewz3n

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2 

% Patents Active = 100.0

 

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2018-2020

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2 patents (USPTO):Explore Patents

Title: The Innovations of Ke Chen

Introduction

Ke Chen is a notable inventor based in Palo Alto, CA. He has made significant contributions to the field of memory systems, holding 2 patents that showcase his innovative approach to technology. His work primarily focuses on enhancing the efficiency and performance of memory controllers.

Latest Patents

One of Ke Chen's latest patents involves the use of separate memory controllers to access data in memory. In this invention, a first memory controller receives an access command from a second memory controller, where the access command is timing non-deterministic with respect to a timing specification of a memory. The first memory controller sends at least one access command signal corresponding to the access command to the memory, ensuring compliance with the timing specification. Additionally, the first memory controller determines a latency of access of the memory and sends feedback information relating to the latency to the second memory controller.

Another significant patent by Ke Chen focuses on caching data in a memory system that has memory nodes at different hierarchical levels. This memory system includes a plurality of memory nodes, each with corresponding memory storage and cache. A memory node at a first hierarchical level is coupled to a processor with lower communication latency than a memory node at a second hierarchical level. The memory nodes cooperate to decide which of them should cache data from a given memory node.

Career Highlights

Ke Chen is currently employed at Hewlett Packard Enterprise Development LP, where he continues to innovate in the field of memory technology. His work has been instrumental in advancing the capabilities of memory systems, making them more efficient and responsive.

Collaborations

Throughout his career, Ke Chen has collaborated with notable colleagues such as Sheng Li and Norman Paul Jouppi. These collaborations have further enriched his work and contributed to the development of cutting-edge technologies.

Conclusion

Ke Chen's contributions to memory technology through his patents reflect his innovative spirit and dedication to advancing the field. His work at Hewlett Packard Enterprise Development LP continues to influence the future of memory systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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