This inventor holds 3 USPTO granted patents. Top assignee: Renesas Electronics Corporation. Active years: 2010-2013.
Company Filing History:
Years Active: 2010-2013
Title: Kazuko Hanawa: Innovator in Semiconductor Technology
Introduction
Kazuko Hanawa is a prominent inventor based in Tokyo, Japan. She has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. Her innovative work focuses on improving the efficiency and heat dissipation characteristics of semiconductor devices.
Latest Patents
One of her latest patents is a semiconductor device and method of manufacturing the same. This invention features a die pad and a heat dissipating plate arranged in a frame that surrounds the die pad. The design includes members that connect the die pad to the inner edge of the heat dissipating plate, along with a suspension lead linked to the outer extension of the heat dissipating plate. A semiconductor chip larger than the die pad is mounted over the die pad and the members. The top surfaces of the die pad and the members are bonded to the back surface of the chip using silver paste, allowing heat to be conducted efficiently from the chip to the heat dissipating plate and dissipated through the leads.
Career Highlights
Kazuko Hanawa is currently employed at Renesas Electronics Corporation, where she continues to develop innovative semiconductor solutions. Her work has been instrumental in advancing the technology used in various electronic devices.
Collaborations
She has collaborated with notable coworkers, including Junichi Arita and Makoto Nishimura, contributing to a dynamic and innovative work environment.
Conclusion
Kazuko Hanawa's contributions to semiconductor technology exemplify her dedication to innovation and excellence in her field. Her patents reflect her commitment to enhancing the performance and efficiency of electronic devices.