Yokohama, Japan

Kazuhiko Iwasaki


Average Co-Inventor Count = 5.5

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2007-2010

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2 patents (USPTO):Explore Patents

Title: Kazuhiko Iwasaki: Innovator in Semiconductor Technology

Introduction

Kazuhiko Iwasaki is a prominent inventor based in Yokohama, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. His work focuses on improving the efficiency and effectiveness of integrated circuit testing.

Latest Patents

Iwasaki's latest patents include a semiconductor integrated circuit incorporating a test configuration and a method and apparatus for determining the optimum initial value for a test pattern generator. The first patent aims to drastically reduce area overhead in semiconductor integrated circuits by utilizing a partially rotational scan circuit. This innovation allows for a more efficient scan test by dividing the scan chain into multiple sub scan-chains, each equipped with specific functions. The second patent addresses the challenge of determining the best initial value for a test pattern generator, which is crucial for efficient integrated circuit testing. By employing fault simulations and iterative calculations, this method seeks to minimize test lengths, thereby enhancing testing efficiency.

Career Highlights

Kazuhiko Iwasaki is affiliated with the Semiconductor Technology Academic Research Center, where he continues to advance semiconductor research and development. His work has been instrumental in pushing the boundaries of integrated circuit technology.

Collaborations

Iwasaki collaborates with notable colleagues such as Masayuki Arai and Satoshi Fukumoto, contributing to a dynamic research environment that fosters innovation in semiconductor technology.

Conclusion

Kazuhiko Iwasaki's contributions to semiconductor technology through his patents and collaborative efforts highlight his role as a key innovator in the field. His work not only addresses current challenges but also paves the way for future advancements in integrated circuit testing.

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