Livermore, CA, United States of America

Kaveh Hosseini

This inventor holds 1 USPTO granted patent. Top assignee: Altera Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kaveh Hosseini. Retrieved from https://idiyas.com/inventor/kaveh-hosseini-dz466g4a

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Kaveh Hosseini and Thermal-Efficient Photonic Integrated Circuits.

Introduction

Kaveh Hosseini is an inventor based in Livermore, California. His patent work includes an approach to improving thermal efficiency in photonic integrated circuit architectures.

Latest Patents

Hosseini is associated with 1 patent, titled “Undercut Architectures for Improved Thermal Efficiency in Photonic Integrated Circuit (PIC) Architectures.” The invention describes a photonic integrated circuit with conductive pads and a micro ring resonator containing a centrally positioned heater element. A cavity beneath the resonator and holes extending from the circuit’s top surface into the cavity are designed to improve thermal efficiency.

Career Highlights

Hosseini works at Altera Corporation. His patent reflects work on thermal management in photonic integrated circuits, where controlling heat can support device performance.

Collaborations

Hosseini’s coworker Chia-Pin Chiu is identified as a professional collaborator.

Conclusion

Kaveh Hosseini’s patent focuses on an undercut architecture intended to improve thermal efficiency in photonic integrated circuits, highlighting his contribution to this area of innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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