Chandler, AZ, United States of America

Karthik Chandrasekharan

This inventor holds 7 USPTO granted patents and 1 published patent application. Top assignees: Broadcom Corporation, Avago Technologies General IP (Singapore) Pte. Ltd., Avago Technologies International Sales Pte. Limited. Active years: 2011-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Karthik Chandrasekharan. Retrieved from https://idiyas.com/inventor/karthik-chandrasekharan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7 

% Patents Active = 57.1

Average Co-Inventor Count = 2.7

ph-index = 3

Forward Citations = 43(Granted Patents)


Location History:

  • Scottsdale, AZ (US) (2014)
  • Chandler, AZ (US) (2011 - 2019)

Company Filing History:


Years Active: 2011-2019

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7 patents (USPTO):Explore Patents

Title: Karthik Chandrasekharan: Innovator in Circuit Design

Introduction

Karthik Chandrasekharan is a notable inventor based in Chandler, AZ (US). He has made significant contributions to the field of circuit design, particularly in enhancing the reliability of latch and flip-flop circuits against soft errors. With a total of 7 patents to his name, his work has had a substantial impact on the industry.

Latest Patents

Chandrasekharan's latest patents include innovative designs aimed at improving the performance of electronic circuits. One of his notable inventions is the "Clocked Miller Latch Design for Improved Soft Error Rate." This patent provides systems, circuits, and chips that harden a latch/flip-flop circuit against soft errors caused by alpha and neutron radiation. The design includes a switch that selectively couples a capacitor to first and second storage nodes during a hold phase, enhancing the circuit's resilience.

Another significant patent is the "Charge Steering Latch for Low Soft Error Rate." This invention features a circuit that steers charges generated from ionization radiation away from a latch. It employs charge steering transistors operating in strong inversion, which are electrically coupled to other transistors in stacked inverters within the latch. During normal operation, these transistors are activated when the other transistors are turned off, effectively reducing the negative impact of ionization radiation on the latch's operation.

Career Highlights

Throughout his career, Karthik has worked with prominent companies such as Broadcom Corporation and Avago Technologies General IP (Singapore) Pte. Ltd. His experience in these organizations has allowed him to refine his skills and contribute to cutting-edge technology in circuit design.

Collaborations

Chandrasekharan has collaborated with talented individuals in the field, including Gregory Djaja and Balaji Narasimham. These partnerships have fostered innovation and have been instrumental in the development of his patented technologies.

Conclusion

Karthik Chandrasekharan is a distinguished inventor whose work in circuit design has led to significant advancements in the industry. His innovative patents demonstrate his commitment to improving electronic circuit reliability and performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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