Taipei, Taiwan

Jyun-Ping Jiang

This inventor holds 1 USPTO granted patent. Top assignees: Himax Technologies, Inc., National Taiwan University. Active years: 2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jyun-Ping Jiang. Retrieved from https://idiyas.com/inventor/jyun-ping-jiang-vd4jafnb

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2012

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1 patent (USPTO):Explore Patents

Title: Innovations by Inventor Jyun-Ping Jiang

Introduction

Jyun-Ping Jiang, an accomplished inventor based in Taipei, Taiwan, has made significant contributions to the field of electrical engineering. His innovative approach has led to the creation of a patent that enhances the functionality of electronic circuits, showcasing his expertise and unique perspective in this evolving domain.

Latest Patents

Jyun-Ping Jiang holds a notable patent for an "Output buffer circuit with enhanced slew rate". This invention discloses a design featuring a first and a second slew-rate enhancing transistor. These transistors are specifically configured to improve the slew rate of both the source and sink transistors within an output stage. The invention also includes a first control circuit and a second control circuit that manage the slew-rate enhancing transistors, turning them off during static states and on during transitions. This innovative approach effectively enhances the performance of electronic devices.

Career Highlights

Throughout his career, Jyun-Ping Jiang has worked with prominent organizations, including Himax Technologies, Inc. and National Taiwan University. His role in these institutions has enabled him to further advance his research and practical applications in electronic circuit design.

Collaborations

Jyun-Ping Jiang has collaborated with talented individuals such as Yi-Jan Chen and Pang-Jung Liu. These collaborations have enriched his research experience and contributed to the development of innovative technologies in the field.

Conclusion

In summary, Jyun-Ping Jiang stands out as a leading inventor whose work on the output buffer circuit with enhanced slew rate illustrates his commitment to innovation in electrical engineering. His collaborations and experiences with notable companies underscore the impact of his contributions to the industry. As technology continues to advance, the influence of inventors like Jiang will remain vital for future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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