Junzhao J Lei

Title: Innovations by Junzhao J Lei in Integrated Circuit Fault Marking

Introduction

Junzhao J Lei is a notable inventor based in Santa Clara, CA, who has made significant contributions to the field of integrated circuit technology. With a focus on improving failure analysis processes, he has developed innovative methods that enhance the identification and marking of faults in integrated circuits.

Latest Patents

Junzhao J Lei holds a patent titled "Methods and apparatus for laser marking of integrated circuit faults." This patent outlines systems and methods for marking integrated circuit defects on wafers to facilitate failure analysis. The process involves testing a wafer containing integrated circuits using a tester, analyzing test data with integrated circuit design files, and identifying suspected faults. A fault location program is utilized to determine the physical location of these faults, mapping them to actual positions on the wafer. The program can also generate laser control files, which guide a laser system to create marks around the identified faults. These marked faults can then be polished and examined under an electron microscope or analyzed with other failure analysis tools. Junzhao J Lei has 1 patent to his name.

Career Highlights

Junzhao J Lei is associated with Altera Corporation, where he has contributed to advancements in integrated circuit technology. His work focuses on enhancing the reliability and efficiency of integrated circuits through innovative fault marking techniques.

Collaborations

Some of his notable coworkers include John M Dicosola and Adam J Wright, who have collaborated with him on various projects within the field.

Conclusion

Junzhao J Lei's innovative work in the area of integrated circuit fault marking has paved the way for improved failure analysis techniques. His contributions continue to influence the field and enhance the reliability of integrated circuits.