Suwon-si, South Korea

Junyeong Seo

This inventor holds 1 USPTO granted patent. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Junyeong Seo. Retrieved from https://idiyas.com/inventor/junyeong-seo-izbj3es5

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Junyeong Seo: Inventor in Modem Chip Technology.

Introduction

Junyeong Seo is an inventor based in Suwon-si, South Korea. His patent work concerns modem technology and methods for efficiently decoding received signals. He is associated with Samsung Electronics Ltd.

Latest Patents

Seo is named on 1 patent: “Modem Chip Employing Low Complexity Log Likelihood Ratio Calculation and Operating Method Thereof.” The invention describes a modem chip with a radio frequency integrated circuit that receives a signal containing channel state information. A processor uses that information to determine the signal-to-interference ratio, selects between log likelihood ratio calculation modes by comparing the ratio with a threshold, and decodes the signal using the selected mode. This approach adapts the calculation method to the signal conditions.

Career Highlights

Seo’s listed patent reflects work on reducing the complexity of signal processing in modem chips. The disclosed method uses signal conditions to guide the choice of decoding calculation.

Collaborations

Seo’s listed coworkers include Joohan Kim and Youngseok Jung. The patent information provided identifies their connection to his professional work but does not specify their individual contributions.

Conclusion

Junyeong Seo’s patent activity highlights an approach to modem signal decoding that selects a log likelihood ratio calculation mode according to signal conditions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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