Sagamihara, Japan

Junya Masumi

This inventor holds 1 USPTO granted patent. Top assignee: Kabushiki Kaisha Toshiba. Active years: 1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Junya Masumi. Retrieved from https://idiyas.com/inventor/junya-masumi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 1998

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1 patent (USPTO):Explore Patents

Title: Junya Masumi: Innovator in Semiconductor Technology

Introduction

Junya Masumi is a notable inventor based in Sagamihara, Japan. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.

Latest Patents

Masumi holds a patent for an interface circuit designed for use in a semiconductor integrated circuit. This invention involves a complex arrangement where an NMOS transistor's source-to-drain current path is connected to an input terminal. The gate of the NMOS is linked to Vcc, while the other end of the current path connects to a protection circuit. This protection circuit consists of both PMOS and NMOS transistors, which work together to safeguard the internal circuit's input stage.

Career Highlights

Junya Masumi is associated with Kabushiki Kaisha Toshiba, a leading company in the technology sector. His work at Toshiba has allowed him to explore and develop advanced semiconductor solutions that enhance the performance and reliability of integrated circuits.

Collaborations

Masumi collaborates with esteemed colleagues such as Yasunori Tanaka and Hiroshi Shigehara. Their combined expertise contributes to the innovative environment at Toshiba, fostering advancements in semiconductor technology.

Conclusion

Junya Masumi's contributions to semiconductor technology through his patent and work at Toshiba highlight his role as an influential inventor in the field. His innovative spirit continues to drive advancements in integrated circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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