Junjing Yan

Title: Innovations by Junjing Yan in Hardware Logic Emulation Systems

Introduction

Junjing Yan is an accomplished inventor based in Mountain View, CA (US). He has made significant contributions to the field of hardware logic emulation systems. His innovative approach focuses on optimizing logical designs for enhanced performance and efficiency.

Latest Patents

Junjing Yan holds a patent titled "Latch optimization in hardware logic emulation systems." This invention presents a method for optimizing latch-based designs by transforming them into flip-flop based circuits. The design is meticulously analyzed to determine whether any consecutive latches are clocked by the same clock signal. When consecutive latches are clocked by the same signal, a transparency condition exists. In such cases, transparent latches are transformed into either a flip-flop/buffer/multiplexer circuit or a buffer circuit, depending on whether the latch has an enable input. Conversely, if consecutive latches are clocked by different signals, they are transformed into a flip-flop.

Career Highlights

Junjing Yan is currently employed at Quickturn Design Systems, Inc., where he continues to develop innovative solutions in hardware design. His work has garnered attention for its practical applications in improving the efficiency of logical designs.

Collaborations

Junjing collaborates with Wei-Jin Dai, a talented woman in the field, contributing to advancements in their projects.

Conclusion

Junjing Yan's contributions to hardware logic emulation systems exemplify the impact of innovative thinking in technology. His patent on latch optimization showcases his commitment to enhancing design efficiency.