Daejeon, South Korea

Jun-So Pak

This inventor holds 1 USPTO granted patent. Top assignees: Korea Advanced Institute of Science and Technology, Skhynix Inc.. Active years: 2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jun-So Pak. Retrieved from https://idiyas.com/inventor/jun-so-pak-ugle6mk4

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2016

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1 patent (USPTO):Explore Patents

Title: Innovations of Jun-So Pak in Semiconductor Testing

Introduction

Jun-So Pak is a notable inventor based in Daejeon, South Korea. He has made significant contributions to the field of semiconductor technology. His work primarily focuses on testing devices that enhance the efficiency and reliability of semiconductor devices.

Latest Patents

Jun-So Pak holds a patent for a "Test device, semiconductor device and testing method thereof." This innovative test device is designed for testing semiconductor devices that include Through-Silicon Vias (TSVs). The device features a ring oscillator composed of multiple inverters, a switch that selectively connects the output node of one of the inverters to the TSV, and a controller that manages the switch's operation.

Career Highlights

Throughout his career, Jun-So Pak has worked with prestigious organizations such as the Korea Advanced Institute of Science and Technology and SK Hynix Inc. His experience in these institutions has allowed him to develop and refine his expertise in semiconductor technology.

Collaborations

Jun-So Pak has collaborated with talented individuals in his field, including Jun-Ho Lee and Joung-Ho Kim. These partnerships have contributed to the advancement of semiconductor testing methodologies.

Conclusion

Jun-So Pak's innovations in semiconductor testing devices demonstrate his commitment to enhancing technology in this critical field. His contributions continue to influence the development of more efficient semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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