Jun Ogawa

Title: Jun Ogawa - Innovator in Semiconductor Testability

Introduction

Jun Ogawa is a notable inventor based in Osaka, Japan. He has made significant contributions to the field of semiconductor technology. His innovative work focuses on enhancing the testability of semiconductor integrated circuits.

Latest Patents

Jun Ogawa holds a patent for a technique aimed at improving the testability of semiconductor integrated circuits. This technique involves several steps, starting with a fault simulation based on a predetermined test pattern. The process discriminates between detectable and undetectable faults. Undetected faults are then listed, and test conditions for these faults are determined. A test pattern that is most likely to meet these conditions is selected from multiple options. Subsequently, the registers associated with the undetected faults are replaced with scan registers, which are connected in a scan chain to create a modified circuit. Finally, a fault simulation is conducted by switching to the test condition at the timing corresponding to the undetected faults using the test pattern for the modified circuit. Jun Ogawa has 1 patent to his name.

Career Highlights

Jun Ogawa is currently employed at Matsushita Electric Industrial Co., Ltd., a leading company in the electronics industry. His work there has been instrumental in advancing semiconductor technologies.

Collaborations

Jun Ogawa collaborates with Yukio Sugimura, a talented woman in the field. Their partnership has contributed to the development of innovative solutions in semiconductor testing.

Conclusion

Jun Ogawa's contributions to semiconductor technology, particularly in testability, highlight his role as an influential inventor. His work continues to impact the industry positively.