Hadano, Japan

Jun Hirano

This inventor holds 1 USPTO granted patent. Top assignee: Hitachi, Ltd.. Active years: 2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jun Hirano. Retrieved from https://idiyas.com/inventor/jun-hirano-yofc29ub

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2000

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1 patent (USPTO):Explore Patents

Title: **Innovator Profile: Jun Hirano – Enhancing Logic Circuit Analysis**

Introduction

Jun Hirano, a notable inventor based in Hadano, Japan, has made significant contributions to the field of semiconductor technology. With one patent to his name, he has showcased his expertise in analyzing logic circuits, which is crucial for advancing electronic design automation.

Latest Patents

Hirano's patent, titled "Method of Analyzing Logic Circuit Test Points," presents an innovative apparatus designed for determining the capability of inserting test points in semiconductor integrated circuits. This technology utilizes circuit information and a test point insertion library to facilitate the evaluation of test point types across signal lines. The method incorporates the calculation of test point indexes to identify candidates that enhance testability, ensuring a comprehensive test point analysis process.

Career Highlights

Currently, Jun Hirano is associated with Hitachi, Ltd., where he continues to apply his knowledge and skills in developing cutting-edge solutions for electronic testing. His work contributes to improving the efficiency and efficacy of semiconductor testing processes, ultimately leading to more reliable electronic products.

Collaborations

During his career, Hirano has collaborated with esteemed colleagues, including Michinobu Nakao and Kazumi Hatayama. The synergy between these professionals reflects a commitment to innovation and excellence in their respective fields.

Conclusion

Jun Hirano's innovative approach to logic circuit analysis demonstrates the importance of detailed testing methodologies in semiconductor design. His contributions not only advance the understanding of test point insertion but also pave the way for future developments in electronic testing technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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