Shanghai, China

Ju Shen


Average Co-Inventor Count = 5.0

ph-index = 2

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2015-2016

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2 patents (USPTO):

Title: Ju Shen: Innovator in Memory Cell Technology

Introduction

Ju Shen is a prominent inventor based in Shanghai, China. He has made significant contributions to the field of memory cell technology, holding 2 patents that showcase his innovative approach to memory design.

Latest Patents

Ju Shen's latest patents include advancements in memory cell architecture. One of his notable inventions is a memory cell that comprises a Static Random Access Memory (SRAM) cell, which includes a reset-set (RS) flip-flop. This memory cell is coupled with a Read Only Memory (ROM) cell, allowing it to set logic states of internal latch nodes of the RS flip-flop when triggered. The design of these memory cells is notably compact, being much smaller than the combined size of traditional ROM and SRAM cells while maintaining the same capacity.

Another significant patent involves an eight transistor (8T) SRAM cell. This invention details a storage cell that includes a word line, a write column select line, and a cross-coupled data latch. The configuration of NMOS switch devices in this design enhances the efficiency and performance of the SRAM cell.

Career Highlights

Ju Shen is currently employed at Nvidia Corporation, where he continues to push the boundaries of memory technology. His work at Nvidia has positioned him as a key player in the development of advanced memory solutions.

Collaborations

Throughout his career, Ju Shen has collaborated with notable colleagues, including Jun Yang and Hwong-Kwo Lin. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Ju Shen's contributions to memory cell technology reflect his dedication to innovation and excellence in the field. His patents not only demonstrate his technical expertise but also pave the way for future advancements in memory design.

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