Jr-Yuan Jeng

Title: Jr-Yuan Jeng: Innovator in Interconnect Structures

Introduction

Jr-Yuan Jeng is a prominent inventor based in Taipei County, Taiwan. He has made significant contributions to the field of interconnect structures, particularly in enhancing their stress buffering capabilities. With a total of 2 patents to his name, Jeng continues to push the boundaries of innovation in electronic device manufacturing.

Latest Patents

Jeng's latest patents focus on an interconnect structure with stress buffering ability. This innovative design includes a first surface connected to a substrate or electronic device, and a second surface also linked to a similar device. A supporting part is sandwiched between the two surfaces, allowing for a smaller area at the ends of the supporting part compared to the surfaces. Additionally, a buffer surrounds the supporting part to absorb and buffer stresses, enhancing the overall durability and performance of the interconnect structure.

Career Highlights

Jr-Yuan Jeng is affiliated with the Industrial Technology Research Institute, where he applies his expertise in developing advanced technologies. His work has been instrumental in improving the reliability of electronic devices through innovative interconnect solutions.

Collaborations

Jeng collaborates with notable colleagues such as Yung-Yu Hsu and Shyi-Ching Liau, contributing to a dynamic research environment that fosters innovation and technological advancement.

Conclusion

Jr-Yuan Jeng is a key figure in the field of interconnect structures, with a focus on stress buffering technologies. His contributions through patents and collaborations highlight his commitment to advancing electronic device manufacturing.