Eindhoven, Netherlands

Josephus H Van Vegchel

This inventor holds 1 USPTO granted patent. Top assignee: U.S. Philips Corporation. Active years: 1990.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Josephus H Van Vegchel. Retrieved from https://idiyas.com/inventor/josephus-h-van-vegchel

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 30(Granted Patents)


Company Filing History:


Years Active: 1990

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1 patent (USPTO):Explore Patents

Title: Josephus H. Van Vegchel: Semiconductor Manufacturing Inventor.

Introduction.

Josephus H. Van Vegchel is an inventor associated with Eindhoven, the Netherlands, and U.S. Philips Corporation. His patent work concerns semiconductor-device manufacturing, including epitaxial silicon growth and the preparation of bonded semiconductor structures.

Latest Patents.

The supplied information identifies one patent for Van Vegchel: “Method of Manufacturing a Semiconductor Device Using SEG and a …”. The described method grows an epitaxial silicon layer on a doped monocrystalline semiconductor body, then bonds that body to a supporting semiconductor body. It includes insulating layers, electrochemical etching to remove the original monocrystalline body down to the epitaxial layer, and deposition and polishing of electrically conducting material. The record lists 1 patent.

Career Highlights.

Van Vegchel’s listed patent reflects work on semiconductor fabrication processes that combine epitaxial growth, bonding, electrochemical etching, and polishing. The supplied information associates his work with U.S. Philips Corporation.

Collaborations.

The named coworkers are Jan Haisma and Johannes E. Van Den Meerakker. The information provided does not specify their roles in the patent or their working relationship with Van Vegchel.

Conclusion.

Josephus H. Van Vegchel is associated with a semiconductor-manufacturing patent focused on producing a bonded structure with an epitaxial silicon layer.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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