Cerritos, CA, United States of America

Joseph S Ciofalo

This inventor holds 1 USPTO granted patent. Top assignee: Other. Active years: 1988.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph S Ciofalo. Retrieved from https://idiyas.com/inventor/joseph-s-ciofalo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 19(Granted Patents)


Company Filing History:

goldMedal1 out of 834,513 
Other
 patents

Years Active: 1988

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Joseph S. Ciofalo: Innovator in Semiconductor Technology

Introduction

Joseph S. Ciofalo is a notable inventor based in Cerritos, California. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique apparatus that enhances the efficiency of chemical vapor deposition processes.

Latest Patents

Joseph S. Ciofalo holds a patent for an "Epitaxial heater apparatus and process." This invention features a quartz envelope that supports a resistance heater. The design includes a boron nitride pill box configured core that supports resistance heater windings. The core has a base with a cylindrical upper portion that defines a hollow chamber and an upper annular ring. A circular top consists of an upper circular portion and a lower circular portion that mates with the base. The annular ring surface is in thermal contact with the upper circular portion to effectively transfer heat from the annular ring to the circular top. A zirconia insulator cups the core, providing heat insulation, along with a heat shield coating in the quartz envelope's interior. Arrays of quartz envelope heaters facilitate the mass production of semiconductors. The horizontal configuration includes a laminar flow head that is disposed at an angle to the horizontal. In operation, a current applied to the windings generates high temperatures for chemical vapor deposition, allowing for the growth of semiconductors on substrates positioned above the envelope with minimal energy utilization. When heated, the heat is transmitted significantly upward along the annular surface of the core, then to the top of the core above the hollow chamber. This design achieves a generally flat temperature across the surface of the core's top, maintaining that uniform temperature when the heat is transmitted to a substrate. Joseph S. Ciofalo has 1 patent to his name.

Career Highlights

Throughout his career, Joseph S. Ciofalo has demonstrated a commitment to advancing semiconductor technology. His innovative designs have contributed to more efficient manufacturing processes in the industry. His work is recognized for its potential to improve energy utilization in semiconductor production.

Collaborations

Joseph S. Ciofalo has collaborated with Steven I. Boldish, further enhancing the impact of his inventions in the field.

Conclusion

Joseph S. Ciofalo is a distinguished inventor whose work in semiconductor technology has paved the

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…