New York, NY, United States of America

Joseph B Heinemann

This inventor holds 2 USPTO granted patents. Top assignee: Timeplex, Inc.. Active years: 1983.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph B Heinemann. Retrieved from https://idiyas.com/inventor/joseph-b-heinemann

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 2

Forward Citations = 80(Granted Patents)


Company Filing History:


Years Active: 1983

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2 patents (USPTO):Explore Patents

Title: The Innovations of Joseph B. Heinemann

Introduction

Joseph B. Heinemann is a notable inventor based in New York, NY, recognized for his contributions to hardware and multi-processor systems. With a total of two patents to his name, Heinemann has made significant strides in the field of technology.

Latest Patents

His latest patents include a "Hardware Memory Write Lock Circuit," which is designed to protect critical data from accidental writing. This innovative circuit requires predetermined memory access cycles to allow access to the critical data memory area during a write cycle. The second patent is for a "Multi-Processor System," which features a master processor and multiple slave processors, each with its own memory. This system maximizes throughput by allowing the master processor to access any slave memory while suspending the operation of a single slave processor for just one memory cycle.

Career Highlights

Heinemann is currently employed at Timeplex, Inc., where he continues to develop and refine his innovative ideas. His work has contributed to advancements in memory protection and multi-processor efficiency.

Collaborations

Heinemann collaborates with Ian K. Persaud, further enhancing the innovative environment at Timeplex, Inc.

Conclusion

Joseph B. Heinemann's contributions to technology through his patents reflect his dedication to innovation and efficiency in hardware systems. His work continues to influence the field and inspire future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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