San Ramon, CA, United States of America

Jong-sik Na

This inventor holds 2 USPTO granted patents. Top assignee: Omnivision Technologies, Inc.. Active years: 2019-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jong-sik Na. Retrieved from https://idiyas.com/inventor/jong-sik-na

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2019-2020

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2 patents (USPTO):Explore Patents

Title: Jong-sik Na: Image Sensor and Memory Innovations

Introduction

Jong-sik Na is an inventor based in San Ramon, California. His work includes image-sensor systems and memory technologies, with 2 patents listed in the information provided. He is associated with OmniVision Technologies, Inc.

Latest Patents

Na’s listed patents address image processing and error correction in memory.

“DRAM with Staggered Word Line Transitions for Hybrid-Bonded Photosensor Arrays” describes an image-sensor architecture in which separate blocks of pixels use individual analog-to-digital converters. The converters write digitized pixel data to image DRAM in hyperlong words using staggered, overlapping word lines. The data then pass through an alignment buffer to an image processor. The associated imaging method reads one pixel from each block simultaneously, digitizes the pixels, and writes them to memory in parallel.

“Memory with Pattern Oriented Error Correction Code” presents a Hamming-code-based approach to detecting and correcting soft errors in memory. A first parity generator creates parity data before a composite word is stored. When the word is retrieved, a second parity generator produces parity for comparison. The resulting error mask can correct a single-bit error, while the code maintains a minimum distance of three.

Career Highlights

Na’s listed inventions focus on improving image-sensor data handling and memory reliability. The DRAM patent describes coordinated data transfer from pixel blocks, while the error-correction patent addresses single-bit error detection and correction. His company affiliation connects this work to OmniVision Technologies, Inc.

Collaborations

The provided information names Chia-Ming Chen and Hoon Ryu as Na’s coworkers. It does not specify their roles in the listed patents or describe particular collaborations.

Conclusion

Jong-sik Na’s listed patent work spans image-sensor data architecture and error-correcting memory, reflecting a focus on efficient imaging systems and reliable data storage.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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