Suwon, South Korea

Jong-Hyun Seok

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jong-Hyun Seok. Retrieved from https://idiyas.com/inventor/jong-hyun-seok-ls4jlkaj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jong-Hyun Seok: Innovator in Semiconductor Technology

Introduction

Jong-Hyun Seok is an inventor based in Suwon-si, South Korea. He has made significant contributions to the field of semiconductor technology. Although he currently holds no granted patents, his innovative ideas are reflected in his latest patent applications.

Latest Patent Applications

Jong-Hyun Seok's recent patent applications include a semiconductor module that features a printed circuit board with a plurality of tab terminals. This module is designed to enhance the functionality and efficiency of semiconductor devices. The first application describes a semiconductor module that includes a printed circuit board and multiple tab terminals, which consist of signal and ground terminals. These terminals are strategically arranged along the edges of the board, with insulation members that cover the terminal ends. The second application outlines a semiconductor module that incorporates a board with a chip area and a tab area, featuring a semiconductor chip and signal tabs. Additionally, it includes an anti-static portion that is spaced apart from the signal tabs, ensuring improved performance and safety.

Conclusion

Jong-Hyun Seok is an emerging inventor in the semiconductor field, showcasing his innovative spirit through his latest patent applications. His work has the potential to influence future developments in semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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