Fremont, CA, United States of America

John Tabler


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Location History:

  • Morgan Hill, CA (US) (2018)
  • Fremont, CA (US) (2019)

Company Filing History:


Years Active: 2018-2019

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Innovations by John Tabler

Introduction

John Tabler is an accomplished inventor based in Fremont, California. He has made significant contributions to the field of electronics, particularly in the area of CMOS circuits. With a total of 2 patents to his name, Tabler's work has had a notable impact on the industry.

Latest Patents

One of John Tabler's latest patents focuses on adaptive body biasing in CMOS circuits to extend the input common mode operating range. This innovative method employs a pair of replica devices that correspond to NMOS and PMOS devices in logic circuits or integrated circuits. The configuration enhances the threshold voltage of the device by utilizing body effect at high input common mode voltages for NMOS and at low input common mode voltages for PMOS. Additionally, it scales the threshold back to normal at low input common mode voltages, effectively countering the negative impact of body effect. This adaptive body biasing technique allows for better performance under varying operating conditions.

Career Highlights

John Tabler is currently employed at Exar Corporation, where he continues to develop cutting-edge technologies. His expertise in CMOS circuit design has positioned him as a valuable asset to the company.

Collaborations

Throughout his career, Tabler has worked alongside talented colleagues such as Vinit Jayaraj and Pekka Ojala. Their collaborative efforts have contributed to the advancement of innovative solutions in the field.

Conclusion

John Tabler's contributions to the field of electronics, particularly through his patents on adaptive body biasing, demonstrate his commitment to innovation. His work continues to influence the development of advanced technologies in CMOS circuits.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…