San Marino, CA, United States of America

John Iannelli

This inventor holds 1 USPTO granted patent and 7 published patent applications. Top assignee: Caelux Corporation. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: John Iannelli. Retrieved from https://idiyas.com/inventor/john-iannelli-n4oc9lbi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 8.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Innovations by John Iannelli in Semiconductor Technology

Introduction

John Iannelli is an accomplished inventor based in San Marino, CA (US). He has made significant contributions to the field of semiconductor technology, particularly in the development of perovskite layers. His innovative work has the potential to advance the efficiency and effectiveness of semiconductor applications.

Latest Patents

John Iannelli holds a patent for "Methods of making semiconductor perovskite layers and compositions thereof." This patent outlines a method for creating semiconductor perovskite layers, which may include a composition of MAFACsPbX. In this composition, MA represents methylammonium, FA stands for formamidinium, and the variables n1, n2, and n3 are independently greater than 0 and less than 1, with the sum of n1, n2, and n3 equaling 1. This innovative approach could lead to advancements in semiconductor technology.

Career Highlights

Iannelli is currently associated with Caelux Corporation, where he continues to work on cutting-edge semiconductor technologies. His expertise and innovative mindset have positioned him as a valuable asset in the field.

Collaborations

One of his notable collaborators is Jing-Shun Huang, with whom he has worked on various projects related to semiconductor technology.

Conclusion

John Iannelli's contributions to semiconductor technology through his innovative patents and collaborations highlight his role as a key inventor in this field. His work continues to pave the way for advancements in semiconductor applications.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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