Cork, Ireland

John Flannery

This inventor holds 1 USPTO granted patent. Top assignee: Artesyn Technologies, Inc.. Active years: 2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: John Flannery. Retrieved from https://idiyas.com/inventor/john-flannery-efz1yguf

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 8(Granted Patents)


Company Filing History:


Years Active: 2004

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1 patent (USPTO):Explore Patents

Title: John Flannery: Innovator in Surface Mount Technology

Introduction

John Flannery is a notable inventor based in Cork, Ireland. He has made significant contributions to the field of surface mount technology. His innovative approach has led to the development of a unique interconnect device that enhances electronic assembly processes.

Latest Patents

Flannery holds a patent for a "Surface mount interconnect and device including same." This invention features a solid conductor with a first section, a second section, and a central section. The first and second sections each include at least one curved surface, while the central section comprises first and second planar surfaces. This design improves the efficiency and reliability of electronic connections.

Career Highlights

John Flannery is currently employed at Artesyn Technologies, Inc., where he continues to push the boundaries of innovation in electronic components. His work has been instrumental in advancing the capabilities of surface mount technology.

Collaborations

Flannery collaborates with talented professionals in his field, including his coworker Michael Gray. Together, they contribute to the development of cutting-edge technologies that benefit the industry.

Conclusion

John Flannery's contributions to surface mount technology exemplify the spirit of innovation. His patent and ongoing work at Artesyn Technologies, Inc. highlight his commitment to advancing electronic assembly processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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