This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignees: Ati Technologies Inc., Ati Technologies Ulc. Active years: 2007-2012.
Company Filing History:
Years Active: 2007-2012
Title: Joe Macri: Innovator in Memory Interface Technologies
Introduction
Joe Macri is a notable inventor based in San Francisco, CA. He has made significant contributions to the field of memory interface technologies, holding a total of 2 patents. His work focuses on enhancing the efficiency and functionality of memory systems.
Latest Patents
Joe Macri's latest patents include "Apparatus and methods for tuning a memory interface." This invention relates to a programmable virtual memory client that features programmable control logic. The control logic is designed to generate at least one data pattern sequence from a number of stored data patterns. Additionally, the virtual memory client includes control logic that utilizes the generated data pattern sequence for reading from and writing to memory devices. Another significant patent is the "Dynamic impedance compensation circuit and method." This invention generates per-group pull-up and pull-down impedance information to calibrate multiple input/output pads. It dynamically updates impedance information on a per-channel basis, ensuring optimal performance for various I/O pads.
Career Highlights
Throughout his career, Joe Macri has worked with prominent companies such as ATI Technologies Inc. and ATI Technologies ULC. His experience in these organizations has allowed him to develop and refine his innovative ideas in memory technology.
Collaborations
Joe has collaborated with talented individuals in the industry, including Sagheer Ahmad and Dan Shimizu. These partnerships have contributed to the advancement of his projects and innovations.
Conclusion
Joe Macri is a distinguished inventor whose work in memory interface technologies has led to valuable patents and advancements in the field. His contributions continue to influence the development of efficient memory systems.

