Milpitas, CA, United States of America

Joachim Pistorius


Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 105(Granted Patents)


Company Filing History:


Years Active: 2008

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1 patent (USPTO):

Title: Innovations of Joachim Pistorius in Logic Design Synthesis

Introduction

Joachim Pistorius is a notable inventor based in Milpitas, California. He has made significant contributions to the field of logic design synthesis, particularly with his innovative approach to optimizing performance through a multiple-pass synthesis technique.

Latest Patents

Pistorius holds a patent for the invention titled "Physical Resynthesis of a Logic Design." This invention focuses on enhancing the performance of design through a two or more pass synthesis methodology. During the initial pass, logic is mapped to various structures, such as logic elements and synthesis gates, within a target technology like a programmable logic device. The subsequent pass involves resynthesizing the mapped design, optimizing logic visibility and configuration more effectively than traditional single-pass synthesis.

Career Highlights

Working at Altera Corporation, Pistorius has progressed in his career with a keen focus on developing advanced solutions in the realm of programmable logic devices. His work contributes significantly to the efficiency and functionality of various digital designs, demonstrating his commitment to innovation in technology.

Collaborations

Throughout his tenure, Pistorius has collaborated with talented individuals, including Michael David Hutton and Babette Van Antwerpen. These partnerships have fostered an environment conducive to creativity and development, allowing them to push the boundaries of logic design further.

Conclusion

Joachim Pistorius's inventive spirit and dedication to improving logic synthesis techniques highlight his importance in the field of electronics and design. His multiple-pass synthesis technique not only represents a valuable contribution to Altera Corporation but also sets a standard for future innovations in programmable logic design.

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