Jle Gu

Title: Jle Gu: Innovator in Statistical Timing Analysis

Introduction

Jle Gu is a prominent inventor based in Dallas, TX (US), known for his contributions to the field of integrated circuit design. With a focus on statistical timing analysis, he has developed innovative methods that enhance the accuracy of timing path delay simulations.

Latest Patents

Jle Gu holds 1 patent for his invention titled "Statistical static timing analysis in non-linear regions." This patent describes a method for simulating the f-sigma timing path delay of an integrated circuit design when local transistor variations influence the stochastic delay. The method involves determining an estimated delay time for a timing path using non-linear operating point analysis of local variations (NLOPALV). By calculating an operating point for each cell in the timing path, the f-sigma delay value is determined and combined to predict the estimated delay for the entire path. This innovative approach can also be extended to address slew rate, predict hold time statistics, prune paths, and manage convergent paths.

Career Highlights

Jle Gu is currently employed at Texas Instruments Corporation, where he applies his expertise in integrated circuit design. His work has significantly contributed to advancements in the field, particularly in improving the reliability and performance of electronic devices.

Collaborations

Jle Gu has collaborated with notable colleagues, including Dennis D Buss and Alice Wang, who share his commitment to innovation in technology.

Conclusion

Jle Gu's work in statistical timing analysis represents a significant advancement in integrated circuit design. His innovative methods continue to influence the industry and enhance the performance of electronic devices.