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For the Inventor, By the Inventor

San Jose, CA, United States of America

Jiunn-Yann Tsai

This inventor holds 8 USPTO granted patents. Top assignee: Lsi Logic Corporation. Active years: 1998-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jiunn-Yann Tsai. Retrieved from https://idiyas.com/inventor/jiunn-yann-tsai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 100.0

Average Co-Inventor Count = 2.5

ph-index = 5

Forward Citations = 92(Granted Patents)


Company Filing History:

goldMedal8 out of 3,715 
 
Lsi Logic Corporation
 patents

Years Active: 1998-2002

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8 patents (USPTO):Explore Patents
1. 6495408 - Local interconnection process for preventing dopant cross diffusion in shared gate electrodes (2002-12-17),
2. 6147409 - Modified multilayered metal line structure for use with tungsten-filled (2000-11-14),
3. 6037262 - Process for forming vias, and trenches for metal lines, in multiple (2000-03-14),
4. 6034401 - Local interconnection process for preventing dopant cross diffusion in (2000-03-07),
5. 6020242 - Effective silicide blocking (2000-02-01),
6. 6010952 - Process for forming metal silicide contacts using amorphization of (2000-01-04),
7. 5874342 - Process for forming MOS device in integrated circuit structure using (1999-02-23),
8. 5851890 - Process for forming integrated circuit structure with metal silicide (1998-12-22),

Title: Jiunn-Yann Tsai: Innovator in Semiconductor Technology

Introduction

Jiunn-Yann Tsai is a prominent inventor based in San Jose, CA, known for his significant contributions to semiconductor technology. With a total of 8 patents, he has made remarkable advancements in the field, particularly in processes that enhance the performance and reliability of integrated circuits.

Latest Patents

One of his latest patents is titled "Local interconnection process for preventing dopant cross diffusion in shared gate electrodes." This innovative process allows for the electrical coupling of gate electrodes in N-type and P-type transistors without causing substantial cross diffusion of dopants. By performing annealing and diffusion steps while keeping the gate electrodes physically isolated, Jiunn-Yann has developed a method that ensures the integrity of the dopant regions. Another notable patent is the "Modified multilayered metal line structure for use with tungsten-filled vias." This patent describes a composite metal line structure that includes a low resistance metal core layer and protective layers that prevent reactions with tungsten, thereby facilitating low resistance contacts in integrated circuits.

Career Highlights

Jiunn-Yann Tsai has built a successful career at LSI Logic Corporation, where he has been instrumental in developing cutting-edge semiconductor technologies. His work has not only advanced the field but has also contributed to the overall efficiency and performance of electronic devices.

Collaborations

Throughout his career, Jiunn-Yann has collaborated with notable colleagues such as Shouli Steve Hsia and Wen-Chin Stanley Yeh. These collaborations have further enriched his work and led to innovative solutions in semiconductor design and manufacturing.

Conclusion

Jiunn-Yann Tsai's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the industry. His innovative processes continue to shape the future of integrated circuits and electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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